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Data Oriented Design

One Million Times Faster!

18:00 - 19:00 Wednesday 26th February 2025 UTC
Intermediate
Advanced
Design

Data-oriented design (DOD) has gained traction for its practical approach to solving real-world problems. Refactoring data into an Entity-Component format sets the stage for cleaner, more efficient implementations—where lambdas process ranges and SIMD operations exploit the power of contiguous data layouts. DOD is widely recognized for addressing hardware-related performance challenges, but where do these challenges originate?

The engineers behind our hardware platforms didn’t design performance bottlenecks; they created performance opportunities. By engineering how our code interacts with hardware, we can unlock these opportunities and achieve substantial speed-ups. The key lies in understanding and exploiting the state of the system. From the instruction cache and registers to the L1 cache and memory access patterns, the processor's statefulness plays a crucial role in performance. Writing "hardware-friendly" code is fundamentally about aligning with this state.

But hardware is only part of the equation. What about the statefulness of our software? By carefully engineering the sequence of operations and algorithms to align with both hardware and software states, we can achieve unparalleled optimization.

This presentation explores these principles through real-world examples in machine learning and mathematical finance, demonstrating how addressing both sides of the problem can yield performance improvements by orders of magnitude.
Attendees will leave with insights into the exploration process and actionable techniques for achieving similar gains in their own work.

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Andrew Drakeford

DirectorUBS

Physics PhD who started out at BT Labs working with AI and acting as a design consultant for large scale systems in network management and billing. He has spent the last few decades designing and writing high performance quantitative libraries and applications in C++. He is interested in quant finance, machine learning, vectorisation, SIMD and HPC. He is a member of the UK C++ panel.

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